io.github.jaspresi/rtl-lint-mcpfiles

RTL Lint MCP

Synced · awaiting check

Lint Verilog and SystemVerilog files and projects with structured diagnostics.

Install

claude mcp add rtl-lint-mcp -- uvx rtl-lint-mcp

Requires: RTL_LINT_ALLOWED_ROOTS

Our take

RTL Lint MCP provides linting for Verilog and SystemVerilog with structured diagnostics for files and projects. It is for hardware and FPGA/ASIC developers who want MCP-based static analysis inside an agent workflow. The niche is narrow but legitimate, and a PyPI package is a good sign, though public adoption and maintenance signals are still sparse in this listing.

reviewed by hand · 2026-08-19

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Verification record

last verified: today
in registry since: 2026-08-18

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