io.neosyn/neosyn-fpga-mcpai

neosyn-fpga-mcp

Verified · today

AI-agent MCP server for FPGA design: compile, validate & generate Verilog from C⏚ HDL.

Install

claude mcp add neosyn-fpga-mcp -- uvx neosyn-fpga-mcp

Requires: CG_JAR

Our take

neosyn-fpga-mcp exposes FPGA design workflows to agents, including compiling, validating, and generating Verilog from C/HDL inputs. It is for hardware developers or researchers exploring agent-assisted FPGA iteration. This is a specialized and high-risk domain, so results should be treated as assistive and verified with established toolchains.

reviewed by hand · 2026-09-21

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Verification record

last verified
today
github stars
1
last commit
today
archived
no
license
MIT
in registry since
2026-09-20

github.com/Neosyn-Logic/cg-agent-kit

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